Pallabi Pahari is an Assistant Professor in the Department of Electronics and Communication Engineering at Haldia Institute of Technology, India, and a PhD research scholar at KIIT University, Bhubaneswar. Her primary research focuses on ultra-low-power semiconductor devices, particularly double-gate tunnel field-effect transistors (DG-TFETs), high-k gate dielectrics, silicon thickness scaling, and engineered N-pocket biosensor devices. She extensively employs TCAD-based device simulation (Silvaco ATLAS) to analyze subthreshold swing, sensitivity, and energy efficiency beyond CMOS limits. She has published her device-centric research in Frontiers in Physics and MDPI, alongside interdisciplinary works integrating device physics with process modeling. Her expertise includes VLSI device design, nanoscale electrostatics, and low-power electronics for next-generation sensing and logic applications.